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logic highの例文

例文モバイル版携帯版

  • The idle state of the UNI / O bus is logic high.
  • The model assumes one line or node in the digital circuit is stuck at logic high or logic low.
  • To generate a standby pulse, the master must drive the bus to a logic high for a minimum of 600 祍.
  • Comparators with an open-drain output stage use an external pull up resistor to a positive supply that defines the logic high level.
  • Since the start bit is logic low ( 0 ) and the stop bit is logic high ( 1 ) there are always at least two guaranteed signal changes between characters.
  • Bubble error correction is a digital correction mechanism that prevents a comparator that has, for example, tripped high from reporting logic high if it is surrounded by comparators that are reporting logic low.
  • In a minimum mode 8086-based system, the 8086 microprocessor is placed into minimum mode by strapping its MN / pin to logic high, i . e . + 5V . In minimum mode, all control signals are generated by the 8086 microprocessor itself.
  • Each character is sent as a logic low start bit, a configurable number of data bits ( usually 8, but users can choose 5 to 8 or 9 bits depending on which UART is in use ), an optional parity bit if the number of bits per character chosen is not 9 bits, and one or more logic high stop bits.
  • :It is the nominal supply voltage ( actually 5v + /-0.25V ) that will guarantee a logic low of < 0.8 v and a logic high of between 2.0 V an 5 v with all the tolerances of the circuit and output loading etc . It does depend upon the internal design of the logic gates.
  • Fan-out is ultimately determined by the maximum source and sink currents of an output and the maximum source and sink currents of the connected inputs; the driving device must be able to supply or sink at its output the sum of the currents needed or provided ( depending on whether the output is a logic high or low voltage level ) by all of the connected inputs, while maintaining the output voltage specifications.